Showing posts with label layout. Show all posts
Showing posts with label layout. Show all posts

Friday, 12 May 2017

Clock build log #1 - analogue board

Alright, alright already! I know this is what some people have been waiting for - actual freakin' construction. So I'll just get straight to it.

Build

I started with construction of the power supply, since that was going to be rather necessary. For a slight retro look I decided to use an axial capacitor as the smoothing capacitor on the input to the linear regulator. The full bridge rectifier has a 100nF capacitor in between the DC terminals as I read this can be good for filtering noise at the output of the rectifier. This then feeds via the smoothing cap in to the 7809 regulator. Another 100nF cap at the output of the regulator helps to filter noise on the output here too (not that I expect that much noise, but it can't hurt) and the positive rail then feeds through a PTC (fuse) for short circuit protection - theres a lot of fiddly wiring all done by hand, and if I happen to short something out or it breaks loose, I don't want anything getting damaged.

It was hard to find a 2.1mm DC jack that wouldn't need me to drill in to my board to create slots that the terminals could be inserted in to for soldering (i.e. nothing with pins on a 0.1" grid), but I had a flash of inspiration and figured that a surface mount jack with some loops of wire over the top of its terminals could be used to make my own "through hole" socket, so thats what I did, and this is what I ended up with for the power supply:



Quite pleased with that result, and the DC jack feels very solid. I used the off cuts of the rectifier diode leads to form the loops as they were quite hefty.

Next came a sprinkling of other building blocks and bits and pieces: the power on reset RC circuit, the AC_CLK/ generator and isolation switch, reset button, and a handful of transistors forming a few gates of logic to glue all of that together.

Soldering all of that in to place, the board now looked like this:


Then I started soldering even more transistors to start building the prescaler.



And around 100 transistors later and after much effort soldering the many many fiddly wires, I was left with this:



The 8 pin socket on the back forms a bus to the next board to carry power and the MCLR, AC_CLK/ and 1PPS_CLK/ signals over.

Confession: construction of the analogue board started in early March, and a couple of things have changed in between then and now, including the AC_CLK/ generator and some circuitry related to the reset button which provides some (better) hardware debouncing. So if you're wondering why perhaps the components you see don't quite line up with the schematics I posted recently, that would explain it. The schematics represent how it has actually been (finally) built.

The thinner blue, red and black wires are 0.22mm2 or 30AWG Kynar insulated wires. They are also sometimes known as "wire wrapping wire".

And here's another slightly artsy shot, because I couldn't help myself.


So yeah, thats about it for construction of the analogue board. The next step was to test it and figure out if this was going to work. And this was where I learned my first lesson: don't build too much all at once.

Testing

Testing the power supply was easy with a multimeter, and the results predictable. 12V AC in, 22V after rectification and smoothing, fed in to the linear regulator which produced 9V DC out.

The power on reset delay circuit was also easily testable by probing the drain pin of its transistor while applying power. When power is applied you see the output high, and after a short period of time while the capacitor charges up it goes low.

That feeds in to the reset mux, along with the reset button, so testing that was a matter of probing the output of the inverter that sits after the NOR gate to which the power on reset delay and reset button are connected. The inverter outputs a positive logic signal referred to as MCLR, and it is high when ever the reset button is pressed, or when the capacitor in the power on reset delay circuit is charging just after power on. That also checked out OK.

Testing the AC_CLK/ generator is a little more complex, I really need to see the waveform it produces alongside the input AC sinewave since it happens too fast to see on a multimeter, so this needed an oscilloscope.

Backstory: I'd been hoping to win something as part of Keysight's Oscilloscope month promotion, but alas I wasn't so lucky. Towards the end I caved and ended up buying myself a Keysight "premium used" MSOX2024A which ended up costing me about half what a brand new model would have cost. I have to say I'm incredibly impressed so far, it looks for all the world like a brand new scope, and came with 5 years warranty. Highly recommend you check out this route first if you're looking to buy a Keysight... So yes, some of the material for this post dates back to then and even earlier. I also started a new job within the past month and a bit, so that has kind of slowed things down a bit too.

Using my newly acquired scope I took some measurements of the rise and fall times of the output of the AC_CLK/ generator to see what its waveform looked like. A very early version of this part of the circuit used a BC547 and I wasn't happy with the output, in particular that the output voltage was only around 4.5V which was uncomfortably close to the gate threshold voltage. So to be safe I re-designed it to use a MOSFET instead, and was much happier with the output voltage at 9V. The rise and fall times were nice and sharp at no more than about 15uS (microseconds) at worst (fall time was just a smidge over 3uS) - also much faster than the original BC547 based circuit. Here are some scope traces of that:



That is of course looking at the time taken to transition between ground and peak voltage - actual "apparent" rise/fall time would be much quicker, because the transistors don't need the full 9V to turn on or off, that happens closer to 4.5V.

The output of the AC_CLK/ generator feeds in to a NOR gate along with the MCLR signal, such that when ever MCLR is asserted the AC_CLK/ signal is held high. When MCLR is not asserted, the AC_CLK/ signal is free to pass through and oscillate. So testing that was a matter of probing the output of the inverter that forms the output of that logic. This was also easy to test with a multimeter in frequency mode, I got ~50hz, so that is all working fine.

On a roll I thought.

Then it came to the prescaler. Was I going to get lucky and was it going to work at all? All of the simulations and breadboarding said it should, but now we're in the real world and at bigger scale.

I used my multimeter in frequency mode to probe the output of the first stage. It was giving me 25hz which is what I expect (since every stage of the prescaler acts as a divide by 2 of its input frequency. The second stage was giving me 12.5hz - brilliant. And the 3rd stage was giving me 6.25hz. "Amazing" I'm thinking, "did I get this all in one go?"

Then I probed the output of the 4th stage and nothing. Zip. Nada. Ah crap, my luck had run out. Since I didn't actually have my oscilloscope at this point in time, I fabricobled a crude logic probe out of an LED, transistor, and a couple of resistors to allow me to get a quick visual from the circuit:


If you would like to build your own, here's the schematic of what I built (you may need to adjust the value of R2, I picked 2.2K to work with the 9V of my power supply, but other logic circuits might need something a little less, perhaps 1K for a 5V circuit for example):


Using this I probed around at the various inputs and outputs to the 4th stage to see where the signal was getting lost, and it just happened to be a solder joint that hadn't properly wetted from the source pin of one transistor to the ground rail. A tiny bit of reflow sorted that right out, and the 4th stage was giving me 3.125hz. Bingo. That was where lesson #1 was learned, because the solder joint was buried in between the wiring, it was a bit tricky getting down in there to make the repair. For future portions of the build I decided I would build and test counter stages one by one to avoid problems like that.

The 5th stage gave me 1.5625hz, and finally somewhere around 0.78125hz at the 6th stage (logical conclusion, because my multimeter can't display that many decimal places). Great, they are all working.

I then proceeded to hook the second, fifth and sixth stages (which represent BCD values of 2+16+32) up to the 3 input NOR gate which feeds the reset circuitry, and probed the non-inverting output of the SR latch, and what do you know, I was getting a very brief pulse once every second.

And with that, the analogue board is complete! It is producing all of the necessary clocking and other signals that are needed to move forward to the next board which will be the "time module", counting seconds, minutes and hours, so I hopefully shouldn't need to pay any more attention to this one.

Thursday, 9 March 2017

Clock design notes #1 - mechanicals and NOR gates

In this post I will cover some of the design and construction choices I have made. Hopefully it will give you an idea of how things are going to come together physically.

Circuit boards

There are examples of discrete clocks out there that can be built on a single PCB, such as this one. But I want something that will be able to stand on its own. So I plan to build my clock using several smaller boards. The boards will all stack together to form something of a brick, with headers and sockets forming a couple of busses between the boards.

There is also another advantage to using this method I have found, and that is I can build the clock in a modular fashion with each board representing a different "functional block". For example, one board will contain all of the counters for the clock, and another will have the decoders to drive the LED displays for the clock.

Initially I went down to my local electronics shop and found what looked like a nice prototyping board, so I grabbed one of them to do some measurements and test some theories. But it became quickly obvious that it wasn't going to cut it for my project as I wouldn't be able to achieve the increasingly apparent density of transistors per board that I will need. The largest problem is that holes are grouped in lots of three with a common pad between them. The way I intend to lay out my boards, which I'll get to a little later, sees a layout like this taking up 50% more space.

So I went to ebay, as one does, and started looking for an alternative, and I found something which looked a lot better. The most immediately obvious thing is that each hole has its own dedicated pad, which means I can choose the density and orientation of components that I need. As a bonus, it has a larger hole in each corner which will make stacking the boards and holding them all together with spacers all that more easier. They are also physically larger in both dimensions, so I have more space to fit things in. So I ordered a bunch of them, knowing that they are coming from China and would likely take a few weeks to arrive, but to my surprise they showed up barely a week later. In comparison I think they will be perfect for the job:



Board stacking

As mentioned above, I plan to build my clock as a stack of boards. I was originally thinking of hard wiring the boards together, but I thought that would be messy and less elegant, and would make maintenance and/or expansion harder.

Standard 0.1" pin headers and sockets would in theory work fine, but I need to get signals from one board, through one or more boards, to other boards in the stack. Standard headers and sockets don't have pins long enough to achieve that, and I would need to stagger them from board to board (because it would be difficult to install them within the same footprint) which would take up additional space that I need for transistors. And don't forget the extra effort to bridge all of the pins of these disparate headers.

To overcome this I'll be using some sockets with extra long pins extending out the back of them. As a proof of concept I ordered a couple of these to test them out, and with a little toying about I was able to convince myself that they would work, and also answer the question of how far apart the boards would end up being spaced: 12mm.

The body of the socket on these connectors is about 10.5mm high off the board, and the pins extend out the back of the board about 5mm. With 12mm spacing, the pins will insert a couple of mm in to their mating socket, and leave a 1.5mm gap from the top of the socket to the next board for solder and signal wires to live in. It will be a tight fit, but I think I've worked out how to make it .. work.

After ordering and receiving all of the required bits and pieces I did a fit test, and heres a sample of what a couple of boards stacked together would look like:


These 4 boards stacked together had a thickness of a little over 42mm, so as you can see, the more boards, the brickier this thing is going to get. I'm anticipating upwards of 8 in total - no one ever said this would be small or compact. 😄

NOR gate construction

All of the logic for the clock will be implemented using discrete NOR gates. There wont be anything close to an integrated circuit in this clock, except perhaps for the linear regulator in the power supply - but that will certainly be it.

Recall that a NOR gate output is high as long as all of the inputs are low. This is very easy to implement in circuitry, so lets run through it.

To start with, the high output state can be achieved by pulling the output pin via a series resistor up to the positive power rail, like this:


Where Q is the output.

On its own this doesn't achieve much, just a constant high output. But by placing a transistor in between the output and the ground rail, you provide a mechanism to control whether the output is pulled high or low. This would be achieved like so:


Where A is an input.

I will actually be using N channel MOSFETs because they will help to reduce the overall part count by cutting out quite a few additional resistors that would likely be needed if I used bipolar transistors.

So how does the above circuit work? Well, an N channel MOSFET will only allow current to pass from drain to source if its gate is brought "high". So in the circuit above, when the gate of the MOSFET is low, current flows from the positive rail, through the series resistor to the output pin where it feeds other parts of the circuit, thus it is "high" and sourcing current. If you apply voltage to the gate of the MOSFET, any current supplied by the series resistor is shunted down to ground, and any circuitry connected to the output pin also sees ground, so the output is now "low" and is sinking current. The series resistor is necessary in order to prevent the positive rail being shorted directly to ground when a MOSFET turns on, which isn't a nice thing to do.

The circuit above actually represents an inverter because its output inverts the state of its single input (low input = high output, high input = low output). You can turn this in to a NOR gate by adding more inputs as such:


Where A and B are both inputs.

Voila, a 2-input NOR gate. If you were to leave both the A and B inputs low so that both of those MOSFETs are not allowing current to pass, then the output will be high. If you turn on either or both of the MOSFETs, they will pull the output low. Add even more MOSFETs to build bigger NOR gates.

Something worth noting to be more "technically correct" (the best kind of correct), is that you shouldn't leave a MOSFET gate "floating", that is, not connected to either the positive or ground power supply rails in some way. MOSFET gates are minutely capacitive such that even touching one with your finger can be enough to turn it "on-ish", but it won't turn off immediately, and in a circuit this could result in "undocumented behavior". Julian Ilett, another YouTuber that I follow, has a video demonstrating this behaviour.

You can take care of this with a "bleed resistor" which ties the gate to ground so that it has some way to discharge itself. This can also be thought of as a "pull down" resistor, because it pulls the gate low. Conversely, you can also use a "pull up" resistor to pull the gate high so that it is always on and use another method, like a button or switch, to shunt it to ground to turn it off. Conveniently, the design of the NOR gate takes care of this, so I'll only need to handle "special cases".

And finally, this is how I will lay my gates out on the board, and I think I've come up with a method that is relatively dense:


This represents two separate NOR gates, a 2-input and 3-input. Here's a description of whats going on:

  • The trace through the middle is the positive power supply rail, one side of the series resistors are connected to it (they will be installed vertically to save space)
  • The traces coming off the series resistors adjacent to the transistors are the NOR gate outputs, and they are commoned with all of the drain pins of the MOSFETs that form part of each respective NOR gate
  • The top and bottom traces are the ground rail, and the source pins of all MOSFETs will be commoned to the ground rail
  • The unconnected pins in the middle of each MOSFET are the gates, and these form the inputs to each NOR gate.

With this layout I have common positive and ground rails between each row of MOSFETs, so I only need alternate their orientation from row to row to connect source and drain pins appropriately.

The specific MOSFET I have chosen to use is the 2N7000, and specifically a variant with splayed legs so that it slots in to holes on a 0.1" grid more easily. Heres a photo of a small batch that I ordered for testing:


Finishing up for this post, with my chosen boards and layout I've calculated that I should be able to build 13 rows with 33 transistors on each, giving me room for about 430 transistors per board while leaving a couple of rows of pads free for the headers and sockets needed for stacking, and I may be able to achieve slightly more than this if push comes to shove.